Michael Bruns is Principal Engineer and President of Cascade Stream. Previously he was a Senior Staff Software Engineer with Coherent Logix, Inc. of Austin, Texas. As technical lead for video codec development his responsibilities included hardware/software architecture, encoder algorithm development, and performance critical implementation. He also contributed to the development of Coherent Logix’s hierarchical, scalable programming model. Before joining Coherent Logix, he was a member of the core technology team of Elemental Technologies where his work included optimizations for real-time performance of high definition video encoders using a general purpose graphics processing unit (GPGPU) programming model. He was among the original engineers of Ambric, a chip manufacturer that developed a massively parallel processor array. He contributed to many aspects of Ambric’s solution in addition to video codec applications, including the programming model, software tools, and run-time host software. Prior work involved hardware and software design and system architecture for Grass Valley Group’s video server product line. Mr. Bruns holds a MSEE degree from the University of California, Berkeley and BSEE from Northwestern University. He is a member of IEEE and a resident of Portland, Oregon.
Michael W. Bruns, “Better Parallel Processing for Video Compression,” 2016 NAB Broadcast Engineering
Conference Proceedings, 4/17/2016.
Michael W. Bruns, Martin A. Hunt, Durga Prasad, Nageswara R. Gunupudi, Sekar Sonachalam, “Parallel design patterns for a low-power, software-defined compressed video encoder.” Proceedings of SPIE Vol. 8063 (SPIE, Bellingham, WA, 2011) 8063-12.
Michael W. Bruns, Martin A. Hunt, Lin Tong, and Keith Bindloss, “A New Programming Methodology for Broadcast Video Encoding Using a Massively Parallel Processor Architecture.” SMPTE Motion Imaging Journal; April 2011; 120:(3) 45-54.
Coherent Logix, Incorporated
Cascade Stream is a Limited Liability Company registered in the state of Oregon.